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Bibframe Work

Title
Modern circuit placement
Type
Text
Monograph
Contribution
Cong, Jason (Contributor)
Nam, Gi-Joon (Contributor)
Subject
Integrated circuit layout (LCSH)
Integrated circuits--Very large scale integration (LCSH)
Integrierte Schaltung (SWD)
Language
English
Illustrative Content
Illustrations
Classification
LCC: TK7874.55 .M63 2007
ZN 4950
Could not render: bf:status
Supplementary Content
bibliography
index
Content
text
Table Of Contents
Benchmarks : ISPD 2005/2006 placement benchmarks
Locality and utilization in placement suboptimality
Flat placement techniques : DPlace : anchor cell-based quadratic placement with linear objective
Kraftwerk : a fast and robust quadratic placer using an exact linear net model
Top-down partitioning-based techniques : Capo : congestion-driven placement for standard-cell and RTL netlists with incremental capability
Congestion minimization in modern placement circuits
Multilevel placement techniques : APlace : a high quality, large-scale analytical placer
FastPlace : an efficient multilevel force-directed placement algorithm
mFAR : multilevel fixed-points addition-based VLSI placement
mPL6 : enhanced multilevel mixed-size placement with congestion control
NTUplace3 : an analytical placer for large-scale mixed-size designs
Conclusion and challenges.
Authorized Access Point
Modern circuit placement
Admin Metadata
Generation Process: DLC marc2bibframe2 v2.5.0
Status: changed
Encoding Level: core
Description Conventions: Anglo-American cataloguing rules
Identified By: bf:Local, 14794845 bf:Local, 013708899
Change Date: 2016-07-27T15:18:03
Creation Date: 2007-04-03
Description Modifier: United States, Library of Congress
Description Authentication:
Non-rendered Predicates: bf:assigner