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Bibframe Work

Title
Embedded SOPC design with NIOS II processor and VHDL examples
Type
Text
Subject
Systems on a chip.
Field programmable gate arrays.
Computer input-output equipment--Design and construction.
VHDL (Computer hardware description language)
Language
English
Illustrative Content
illustrations
Classification
LCC: TK7895.E42 C48 2011 (Source: dlc)
DDC: 621.39/2 full (Assigner: dlc)
TEC008010 (Source: bisacsh)
Identified By
Lccn: 2011022710
Summary
"The book is divided into four major parts. Part I covers HDL constructs and synthesis of basic digital circuits. Part II provides an overview of embedded software development with the emphasis on low-level I/O access and drivers. Part III demonstrates the design and development of hardware and software for several complex I/O peripherals, including PS2 keyboard and mouse, a graphic video controller, an audio codec, and an SD (secure digital) card. Part IV provides three case studies of the integration of hardware accelerators, including a custom GCD (greatest common divisor) circuit, a Mandelbrot set fractal circuit, and an audio synthesizer based on DDFS (direct digital frequency synthesis) methodology.The book utilizes FPGA devices, Nios II soft-core processor, and development platform from Altera Co., which is one of the two main FPGA manufactures. Altera has a generous university program that provides free software and discounted prototyping boards for educational institutions (details at http://www.altera.com/university). The two main educational prototyping boards are known as DE1 ($99) and DE2 ($269). All experiments can be implemented and tested with these boards. A board combined with this book becomes a "turn-key" solution for the SoPC design experiments and projects. Most HDL and C codes in the book are device independent and can be adapted by other prototyping boards as long as a board has similar I/O configuration"-- Provided by publisher.
Authorized Access Point
Chu, Pong P., 1959- Embedded SOPC design with NIOS II processor and VHDL examples